// Copyright 2015-2020 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
//     http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

#pragma once

#ifdef __cplusplus
extern "C" {
#endif

/**
 * Enable CPU interrupt
 * @param rv_int_num  CPU interrupt number
 */
void riscv_interrupt_enable(int rv_int_num);

/**
 * Disable CPU interrupt
 * @param rv_int_num  CPU interrupt number
 */
void riscv_interrupt_disable(int rv_int_num);

/**
 * Globally enable CPU interrupts
 */
void riscv_global_interrupts_enable(void);

/**
 * Globally disable CPU interrupts
 */
void riscv_global_interrupts_disable(void);

#ifdef __cplusplus
}
#endif
